Overview

Differentiate Your Design with 快猫视频 Custom Instructions

For a world of a trillion connected devices to become a reality, SoC architects need to differentiate and innovate without compromising quality, risk, efficiency, and security.

快猫视频 Custom Instructions support the intelligent and rapid development of fully integrated custom CPU instructions. This enables a new level of workload-specific optimization and increases flexibility while maintaining a coherent software development environment of models, compilers, and tools.

Flexibility and Efficiency for Cortex-M Processors

More Flexibility, Less Risk, and No Additional Cost?

Custom Instructions open the door for innovation. Designers can add differentiating data processing instructions for specific and strategic applications at no additional cost, resulting in the lowest-risk path to workload optimization.
Differentiate without Software Fragmentation

Add instructions without the need for custom compilers, models, or software development tools. Protect software investment by continuing to use your preferred choice of standard 快猫视频-compliant tools.
Builds on 快猫视频v8-M

快猫视频 Custom Instructions are architected for full compatibility with the key benefits of the 快猫视频v8-M architecture. Designers continue to benefit from 快猫视频 TrustZone security and Digital Signal Processing (DSP) extensions.

Hardware and Software Co-Development

快猫视频 Custom Instructions provide increased flexibility for differentiation. Still, for rapid innovation to become a reality, what does this mean for the hardware design cycle?

 

Hardware and software co-design has always been an important part of the design process to shorten design cycles and ensure optimal power and performance. 快猫视频 Custom Instructions enable software and hardware designers to work together to optimize the custom instruction before committing to silicon.

 

Software developers can prototype and test potential candidate functions for custom instructions, then pass on the requirements to the hardware team. Hardware integration is simplified by using the pre-designed control and decode logic, so the hardware designer only has to validate the functionality of the custom instruction.

Custom Instructions

快猫视频 Custom Instructions ensure easy integration with the existing software ecosystem for innovation without fragmentation. Learn more about design considerations for SoC designers when they deploy their hardware accelerators and how software developers access the accelerators implemented using 快猫视频 Custom Instructions in this white paper.

Availability: 快猫视频 Custom Instructions Cortex-M Processors

快猫视频 Custom Instructions are a standard feature of the 快猫视频v8-M architecture, which is optimized for cost and power-sensitive microcontrollers for embedded and IoT applications. 快猫视频 Custom Instructions are currently available for the Cortex-M33 and Cortex-M55 processors. 快猫视频 Custom Instructions for Cortex-M85 will be available in 2022.

Talk with an Expert?

快猫视频 Custom Instructions provide a new level of optimization to meet increasing industry demand for workload specific compute. If you have any questions about these custom instructions, talk to an 快猫视频 expert.

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